- How to start and use Behavioral Compiler
- How to use BCView to graphically analyze a design
- How to code for synthesis
- How to simulate a design for pre-synthesis and post-synthesis verification
The estimated completion time for the tutorial is 1 to 3 hours. After completing this introduction to Behavioral Compiler, you can take the Synopsys 3 or 4 day class to learn about behavioral synthesis in greater depth.
Two excellent reference books on behavioral synthesis are the following:
- Understanding Behavioral Synthesis, A Practical Guide to High Level Design by John P Elliott; Kluwer Academic Publishers ISBN 0-7923-8542-X
- Behavioral Synthesis, Digital System Design Using the Synopsys Behavioral Compiler by David W. Knapp, Prentice Hall, ISBN 0-13-569252-0
Optimal Use of the TutorialFor optimal use of the tutorial, display the tutorial and run Behavioral Compiler on the same UNIX workstation. This gives you the advantage of copying and pasting examples and commands from the tutorial into the Behavioral Compiler command line interface (bc_shell).
Behavioral Compiler Inputs and Outputs
The following drawing illustrates the inputs you provide to Behavioral Compiler, user-created Verilog or VHDL designs, user-defined constraints (timing, area, throughput, etc), and data from a technology library and [optionally] a DesignWare library. Behavioral Compiler creates output RTL and HDL files for synthesis and simulation. Behavioral Compiler also provides reports and the Behavioral Compiler View tool for design analysis prior to simulation.